ASM5I961C Datasheet Low Voltage Zero Delay Buffer

Manufacturer: Alliance Semiconductor

Overview: July 2005 rev 0.2 Low Voltage Zero Delay Buffer.

Datasheet Details

Part number	ASM5I961C
Manufacturer	Alliance Semiconductor
File Size	723.26 KB
Description	Low Voltage Zero Delay Buffer
Datasheet	ASM5I961C_AllianceSemiconductor.pdf

The ASM5I961C is a 2.5V or 3.3V patible, 1:18 PLL based zero delay buffer.

With output frequencies of up to 200MHz, output skews of 150pS the device meets the needs of the most demanding clock tree applications.

The ASM5I961 is offered with two different configurations.

Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance ASM5I961C reference clock while the ASM5I961P offers an LVPECL reference clock. When pulled high the OE pin will force all of the outputs (except QFB) into a high impedance state. Because the OE pin does not affect the QFB output, down stream clocks can be disabled without the internal PLL losing lock. The ASM5I961C is fully 2.5V or 3.3V compatible and requires no external l.

Part Number	Description
ASM5I961P	Low Voltage Zero Delay Buffer
ASM5I9653A	3.3V 1:8 LVCMOS PLL Clock Generator
ASM5I9658	3.3V 1:10 LVCMOS PLL Clock Generator
ASM5I9350	3.3V 1:10 LVCMOS PLL Clock Generator
ASM5I9351	9-Output Zero Delay Buffer
ASM5I9352	11-Output Zero Delay Buffer
ASM5I9772A	12-Output Zero Delay Buffer
ASM5I9773A	12-Output Zero Delay Buffer
ASM5I9774A	12-Output Zero Delay Buffer
ASM5I9775A	14-Output Zero Delay Buffer