ASM5I9653A Datasheet | Alliance Semiconductor

July 2005 rev 0.2 3.3V 1:8 LVCMOS PLL Clock Generator Features - - - 1:8 PLL based low-voltage clock generator Supports zero-delay operation 3.3V power supply ASM5I9653A running at either 4x or 8x of the reference clock frequency. The ASM5I9653A is guaranteed to lock in a low power PLL mode in the high frequency range (VCO_SEL = 0) down to PLL = 145 MHz or Fref = 36.25MHz. The ASM5I9653A has a differential LVPECL reference input long with an external feedback input. The device is ideal for use as a zero delay, low skew fanout buffer. The device performance has been tuned and optimized for zero delay performance. The PLL_EN and BYPASS controls select the PLL bypass configuration for test...