ADSP-2165 Datasheet | Analog Devices

a DSP Microputers with ROM ADSP-216x SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus and Dual Data Buses Independent putation Units: ALU, Multiplier/ Accumulator and Shifter Single-Cycle Instruction Execution and Multifunction Instructions On-Chip Program Memory ROM and Data Memory RAM Integrated I/O Peripherals: Serial Ports, Timer Features 25 MIPS, 40 ns Maximum Instruction Rate (5 V) Separate On-Chip Buses for Program and Data Memory Program Memory Stores Both Instructions and Data (Three-Bus Performance) Dual Data Address Generators with Modulo and Bit-Reverse Addressing Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop Setup Double-Buffered Serial Ports with panding Hardware, Automatic Data Buffering and Multichannel Operation Three Edge- or Level-Sensitive Interrupts Low Power IDLE Instruction PLCC and MQFP Packages GENERAL DESCRIPTION The ADSP-216x Family processors are single-chip microputers␣ optimized␣ for␣ digital␣ signal␣ processing␣ (DSP) and other high speed numeric processing applications. The ADSP-216x processors are all built upon a mon core with ADSP-2100. Each processor bines the core DSP architecture- putation units, data address generators and program sequencer- with Features such as␣ on-chip program ROM and data memory RAM, a programmable timer and two serial ports. The ADSP-2165/ADSP-2166 also adds program memory and power-down mode. This data sheet describes the following ADSP-216x Family processors: ADSP-2161/ADSP-2162/ ADSP-2163/ADSP-2164 ADSP-2165/ADSP-2166 Custom ROM-programmed DSPs: ROM-programmed ADSP-216x processors with power-down and larger on-chip memories (12K Program Memory ROM, 1K Program Memory RAM, 4K Data Memory RAM) FUNCTIONAL BLOCK DIAGRAM DATA ADDRESS GENERATORS PROGRAM SEQUENCER DAG 1 DAG 2 MEMORY PROGRAM MEMORY DATA MEMORY PROGRAM MEMORY ADDRESS DATA MEMORY ADDRESS PROGRAM...