Description
a DSP Microcomputers with ROM ADSP-216x SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-.
Features
* 25 MIPS, 40 ns Maximum Instruction Rate (5 V) Separate On-Chip Buses for Program and Data Memory Program Memory Stores Both Instructions and Data (Three-Bus Performance) Dual Data Address Generators with Modulo and Bit-Reverse Addressing Efficient Program Sequencing with Zero-Overhead Looping: SinglApplications
* The ADSP-216x processors are all built upon a common core with ADSP-2100. Each processor combines the core DSP architectureADSP-2166 Distributors
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