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CY7C1362C - 9-Mbit Pipelined SRAM

Download the CY7C1362C datasheet PDF (CY7C1360C included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 9-mbit pipelined sram.

Description

The CY7C1360C/CY7C1362C SRAM integrates 256K × 36 and 51

Features

  • Supports bus operation up to 200 MHz.
  • Available speed grades: 200 MHz, and 166 MHz.
  • Registered inputs and outputs for pipelined operation.
  • 3.3 V core power supply (VDD).
  • 2.5 V/3.3 V I/O operation (VDDQ).
  • Fast clock-to-output times.
  • 3.0 ns (for 200 MHz device).
  • Provide high performance 3-1-1-1 access rate.
  • User selectable burst counter supporting Intel Pentium® interleaved or linear burst sequences.
  • Separate processor and controller address str.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1360C-CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.
Other Datasheets by Cypress Semiconductor

Full PDF Text Transcription

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CY7C1360C CY7C1362C 9-Mbit (256K × 36/512K × 18) Pipelined SRAM 9-Mbit (256K × 36/512K × 18) Pipelined SRAM Features ■ Supports bus operation up to 200 MHz ■ Available speed grades: 200 MHz, and 166 MHz ■ Registered inputs and outputs for pipelined operation ■ 3.3 V core power supply (VDD) ■ 2.5 V/3.3 V I/O operation (VDDQ) ■ Fast clock-to-output times ❐ 3.
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