* Fully Synchronous Dynamic RAM with all input signals except DM, DQS and DQ referenced to a positive clock edge
* Double Data Rate interface Differential CLK (/CLK) input Data inputs and DM are synchronized with both edges of DQS Data outputs and DQS are synchronized with a cross po
EDD1216ALTA Datasheet (1.60 MB)
EDD1216ALTA
Elpida Memory
1.60 MB
128 m-bit synchronous dram.
PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT EDD1204ALTA, EDD1208ALTA, EDD1216ALTA 128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) .
📁 Related Datasheet
EDD1216AASE 128M bits DDR SDRAM (Elpida Memory)
EDD1216AATA 128M bits DDR SDRAM (Elpida Memory)
EDD1204ALTA 128 M-bit Synchronous DRAM (Elpida Memory)
EDD1208ALTA 128 M-bit Synchronous DRAM (Elpida Memory)
EDD12322GBH-TS 128M bits DDR Mobile RAM (Elpida Memory)
EDD1232AABH 128M bits DDR SDRAM (Elpida Memory)
EDD1232AAFA 128M bits DDR SDRAM (Elpida Memory)
EDD1232ABBH 128M bits DDR SDRAM (Elpida Memory)
EDD10161BBH-TS 1G bits DDR Mobile RAM (Elpida Memory)
EDD10163BBH-LS 1G bits DDR Mobile RAM (Elpida Memory)
