Elpida Memory EDD1216AASE
The EDD1216AASE is a 128M bits Double Data Rate (DDR) SDRAM organized as 2,097,154 words × 16 bits × 4 banks. This highspeed data transfer is realized by the 2 bits prefetchpipelined architecture. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable.| Part No. | EDD1216AASE |
|---|---|
| Datasheet | EDD1216AASE Download |
| Manufacturer |  Elpida Memory |
| Description | 128M bits DDR SDRAM |
| Buy | Stock & Price |
DESCRIPTION
Read and write operations are performed at the cross points of the CK and the /CK. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. It is packaged in 60-ball FBGA (µBGA) package.FEATURES
● Power supply : VDDQ = 2.5V ± 0.2V : VDD = 2.5V ± 0.2V● Data rate: 333Mbps/266Mbps (max.)
● Double Data Rate architecture; two data transfers per clock cycle
● Bi-directional, data strobe (DQS) is transmitted /received with data, to be used in capturing data at the receiver
● Data inputs, outputs, and DM are synchronized with DQS
● 4 internal ban
