XRK39653 buffer equivalent, 8-output zero delay buffer.
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8 LVCMOS Clock Outputs 1 Feedback Output LVPECL reference clock input 25-200 MHz input/output frequency range
* Input/Output range (÷4): 50-.
It provides 9 low skew, low jitter outputs ideal for networking, computing and telecom applications. The PLL based desi.
The XRK39653 is a low voltage high performance PLL based zero delay buffer/clock generator designed for high speed clock distribution applications. It provides 9 low skew, low jitter outputs ideal for networking, computing and telecom applications. T.
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