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XRK39653 - 8-OUTPUT ZERO DELAY BUFFER

General Description

The XRK39653 is a low voltage high performance PLL based zero delay buffer/clock generator designed for high speed clock distribution applications.

It provides 9 low skew, low jitter outputs ideal for networking, computing and telecom applications.

Key Features

  • 8 LVCMOS Clock Outputs 1 Feedback Output LVPECL reference clock input 25-200 MHz input/output frequency range.
  • Input/Output range (÷4): 50-125MHz.
  • Input/Output range (÷8): 25-62.5MHz.
  • 150ps max output to output skew.
  • Two bypass test mode options.
  • Fully Integrated PLL 3.3V Operation Pin compatible with MPC9353 Industrial temp range: -40°C to +85°C 32-Lead TQFP Packaging FIGURE.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com xr FEBRUARY 2006 PRELIMINARY XRK39653 REV. P1.0.0 3.3V, 8-OUTPUT ZERO DELAY BUFFER use. The second is a full bypass mode that has the PLL and divider operation removed (BYPASS=0). In this mode the reference clock directly sources the outputs drivers. XRK39653 GENERAL DESCRIPTION The XRK39653 is a low voltage high performance PLL based zero delay buffer/clock generator designed for high speed clock distribution applications. It provides 9 low skew, low jitter outputs ideal for networking, computing and telecom applications. The PLL based design allows the 9 outputs (8 clock outputs and 1 feedback output) to be phase aligned to the input reference clock. The outputs source LVCMOS compatible levels and can drive 50Ω transmission lines.