Datasheet Details
| Part number | 74LS73 |
|---|---|
| Manufacturer | Fairchild Semiconductor |
| File Size | 53.28 KB |
| Description | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| Datasheet |
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| Part number | 74LS73 |
|---|---|
| Manufacturer | Fairchild Semiconductor |
| File Size | 53.28 KB |
| Description | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| Datasheet |
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This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.
The J and K data is processed by the flip-flops on the falling edge of the clock pulse.