74LS73A
Overview
Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference val...
| Part | 74LS73A |
|---|---|
| Description | Dual J-K Flip-Flops |
| Manufacturer | Hitachi Semiconductor |
| Size | 67.00 KB |
Related Datasheets
| Part Number | Manufacturer | Description |
|---|---|---|
| 74LS73A | Fairchild Semiconductor | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| 74LS73 | Fairchild Semiconductor | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| 74LS73 | Motorola Semiconductor | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| 74LS74 | Texas Instruments | Dual D-Type Positive-Edge-Triggered Flip-Flop |
| 74LS76 | onsemi | Dual JK Flip-Flop |