25 V, 0.68 A continuous, 2 A Peak. RDS(ON) = 0.6 Ω @ VGS = 2.7 V RDS(ON) = 0.45 Ω @ VGS= 4.5 V. Very low level gate drive requirements allowing direct operation in 3V cir.

as a replacement for digital transistors in load switching applications. Since bias resistors are not required this one .

These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This dev.

FDC6301N

FDC6302P

FDC6304P

FDC6305N

FDC6306P

FDC6308P

FDC6310P

FDC6312P

FDC6318P

FDC6320C

FDC6321C

FDC6322C

FDC6323L