Download FDMT80060DC Datasheet PDF
Fairchild Semiconductor
FDMT80060DC
Features General Description - Max r DS(on) = 1.1 mΩ at VGS = 10 V, ID = 43 A - Max r DS(on) = 1.3 mΩ at VGS = 8 V, ID = 37 A - Advanced Package and Silicon bination for low r DS(on) and high efficiency - Next generation enhanced body diode technology, engineered for soft recovery - Low profile 8x8mm MLP package This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Power Trench® process. Advancements in both silicon and Dual Cool TM package technologies have been bined to offer the lowest r DS(on) while maintaining excellent switching performance by extremely low Junction-to-Ambient thermal resistance. Applications - MSL1 robust package design - Oring FET / Load Switching - 100% UIL tested - Synchronous Rectification - Ro HS pliant - DC-DC Conversion Pin 1 Pin 1 S SS Top Dual Cool TM 88 Bottom MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Symbol VDS VGS Drain to Source Voltage Gate to Source Voltage Drain Current...