MB85R2002 Datasheet | Fujitsu Semiconductor Limited

FUJITSU MICROELECTRONICS DATA SHEET DS05-13108-4E Memory FRAM CMOS 2 M Bit (128 K × 16) - DESCRIPTIONS The MB85R2002 is an FRAM (Ferroelectric Random Access Memory) chip consisting of 131,072 words × 16 bits of non-volatile memory cells created using ferroelectric process and silicon gate CMOS process technologies. The MB85R2002 is able to retain data without using a back-up battery, as is needed for SRAM. The memory cells used in the MB85R2002 can be used for 1010 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and E2PROM. The MB85R2002 uses a pseudo-SRAM interface that is patible with conventional asynchronous SRAM. - Features - - - - - - - Bit configuration Read/write endurance Operating power supply voltage Operating temperature range Data retention LB and UB data byte control Package : 131,072 words × 16 bits : 1010 times/bit : 3.0 V to 3.6 V : - 40 °C to +85 °C : 10 years (+55 °C) : 48-pin plastic TSOP (1) Copyright©2007-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2009.8 Free Datasheet http://../ - PIN ASSIGNMENT (TOP VIEW) A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE CE2 GND UB LB VCC NC A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 NC GND I/O16 I/O8 I/O15 I/O7 I/O14 I/O6 I/O13 I/O5 VCC I/O12 I/O4 I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 OE GND CE1 A0 (FPT-48P-M25) - PIN DESCRIPTION Pin name A0 to A16 I/O1 to I/O16 CE1 CE2 WE OE LB, UB VCC GND NC Address Input Data Input/Output Chip Enable 1 Input Chip Enable 2 Input Write Enable Input Output Enable Input Data Byte Control Input Power Supply Ground No Connection Function DS05-13108-4E Free Datasheet http://../ - BLOCK DIAGRAM A0 - - - Address Latch. to Row Dec. Ferro Capacitor Cell A16 Column Dec. int CE2 S/A CE2 int CEB LB UB WE OE...