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ICSSSTUBF32866A Datasheet Preview

ICSSSTUBF32866A Datasheet

25-Bit Configurable Registered Buffer

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Integrated
Circuit
Systems, Inc.
ICSSSTUBF32866A
Advance Information
25-Bit Configurable Registered Buffer for DDR2
Recommended Application:
• DDR2 Memory Modules
• Provides complete DDR DIMM solution with
ICS97ULP877
• Ideal for DDR2 667, and 800
Product Features:
• 25-bit 1:1 or 14-bit 1:2 configurable registered buffer
with parity check functionality
• Supports SSTL_18 JEDEC specification on data
inputs and outputs
• Supports LVCMOS switching levels on CSR and
RESET inputs
• Low voltage operation
VDD = 1.7V to 1.9V
• Available in 96 BGA package
• Drop-in replacement for ICSSSTUA32864
• Green packages available
Functionality Truth Table
I nputs
Outp uts
RST
DCS
CSR
CK
Dn,
CK DODT, Qn
DCK E
QCS
QODT,
QCKE
HLL
LL LL
HLL
HHL H
H
L
L L or H L or H X
Q0 Q0 Q0
HLH
LL LL
HLH
HHL H
H
L
H L or H L or H X
Q0 Q0 Q0
HHL
LL HL
HHL
HHHH
H H L L or H L or H X Q0 Q0 Q0
HHH
L Q0 H L
HHH
H Q0 H H
H H H L or H L or H X Q0 Q0 Q0
L
X or X or X or X or X or
Floating Floating Floating Floating Floating
L
L
L
Pin Configuration
123456
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
96 Ball BGA
(Top View)
1240—07/17/06
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.




ICS

ICSSSTUBF32866A Datasheet Preview

ICSSSTUBF32866A Datasheet

25-Bit Configurable Registered Buffer

No Preview Available !

ICSSSTUBF32866A
Advance Information
Ball Assignments
25 bit 1:1 Register
A DCKE
B D2
PPO
D15
V REF
GND
VDD
GND
QCKE
Q2
C D3
D16
VDD
VDD
Q3
D DODT QERR GND GND QODT
E D5
F D6
D17
VDD
VDD
Q5
D18 GND GND Q6
G PAR_IN RST
H CK
DCS
J CK
CSR
K D8
D19
VDD
GND
VDD
GND
VDD
GND
VDD
GND
C1
QCS
ZOH
Q8
L D9
D20
VDD
VDD
Q9
M D10 D21 GND GND Q10
N D11
D22
VDD
VDD
Q11
P D12 D23 GND GND Q12
R D13 D24 VDD VDD Q13
T D14
D25
V REF
VDD
Q14
12345
C0 = 0, C1 = 0
NC
Q15
Q16
NC
Q17
Q18
C0
NC
ZOL
Q19
Q20
Q21
Q22
Q23
Q24
Q25
6
14 bit 1:2 Registers
A DCKE
B D2
C D3
PPO
NC
NC
D DODT
E D5
F D6
QERR
NC
NC
G PAR_IN RST
H CK
DCS
J CK
CSR
K D8
NC
L D9
NC
M D10
NC
N D11
NC
P D12
NC
R D13
NC
T D14
NC
12
V REF
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
V REF
3
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
VDD
4
QCKEA QCKEB
Q2A Q2B
Q3A Q3B
QODTA QODTB
Q5A Q5B
Q6A Q6B
C1
QCSA
ZOH
Q8A
Q9A
Q10A
Q11A
Q12A
Q13A
Q14A
C0
QCSB
ZOL
Q8B
Q9B
Q10B
Q11B
Q12B
Q13B
Q14B
56
Register A (C0 = 0, C1 = 1)
A D1
PPO
B D2
NC
C D3
NC
D D4
E D5
QERR
NC
F D6
NC
G PAR_IN RST
H CK
DCS
J CK
CSR
K D8
NC
L D9
NC
M D10
NC
N DODT NC
P D12
NC
R D13
NC
T DCKE NC
12
V REF
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
V REF
3
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
VDD
4
Q1A Q1B
Q2A Q2B
Q3A Q3B
Q4A
Q5A
Q6A
Q4B
Q5B
Q6B
C1 C0
QCSA QCSB
ZOH
Q8A
ZOL
Q8B
Q9A Q9B
Q10A Q10B
QODTA QODTB
Q12A Q12B
Q13A Q13B
QCKEA QCKEB
56
Register B (C0 = 1, C1 = 1)
1240—07/17/06
2


Part Number ICSSSTUBF32866A
Description 25-Bit Configurable Registered Buffer
Maker ICS
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