ICSSSTUBF32866A - 25-Bit Configurable Registered Buffer

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Datasheet Details

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation..

25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity check functionality.
Supports SSTL_18 JEDEC specification on data inputs and outputs.
Supports.

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