ICSSSTUB32864A - 25-Bit Configurable Registered Buffer

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ICS

Part number	ICSSSTUB32864A
Manufacturer	ICS
File Size	171.02 KB
Description	25-Bit Configurable Registered Buffer
Datasheet	ICSSSTUB32864A Datasheet
Additional preview pages of the ICSSSTUB32864A datasheet.

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation.

All clock and data inputs are compatible with the JEDEC standard for SSTL_18.

The control inputs are LVCMOS.

25-bit 1:1 or 14-bit 1:2 configurable registered buffer.
Supports SSTL_18 JEDEC specification on data inputs and outputs.
Supports LVCMOS switching levels on C0, C1 and RESET# inputs.
Low voltage operation VDD = 1.7V to 1.9V.
Available in 96 BGA package.
Drop-in replacement for ICSSSTUB32866.
Green packages available Pin Configuration 1 A B C D E F G H J K L M N P R T 2 3 4 5 6 96 Ball BGA (Top View) Truth Table I nputs RST# H H.

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Published: Oct 2, 2007 |