4:1 or 2:1 lvds clock multiplexer.
* High speed differential multiplexer. The device can be configured
as either a 4:1 or 2:1 multiplexer
* One LVDS output pair
* Four sele.
The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the internal re.
The 854S057B is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz. The PCLK, nPCLK pairs can accept most standard differential input levels. Internal termination is provided on each differential input pair. The 854S057B operates using .
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