854S057B - 4:1 or 2:1 LVDS Clock Multiplexer

IDT

General Description

The 854S057B is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz.

The PCLK, nPCLK pairs can accept most standard differential input levels.

Internal termination is provided on each differential input pair.

Key Features

High speed differential multiplexer. The device can be configured as either a 4:1 or 2:1 multiplexer.
One LVDS output pair.
Four sele.

📥 Download Datasheet

854S057B 4:1 or 2:1 lvds clock multiplexer by IDT - Datasheet Preview

Datasheet Details

Part number	854S057B
Manufacturer	IDT
File Size	357.28 KB
Description	4:1 or 2:1 LVDS Clock Multiplexer
Datasheet	854S057B Datasheet

📁 Similar Datasheet

Part Number	Description	Manufacturer
854S057B	4:1 or 2:1 LVDS Clock Multiplexer	Renesas
854S057	4:1 or 2:1 LVDS Clock Multiplexer	Renesas
854S006	Differential-to-LVDS Fanout Buffer	Renesas
854S01I	2:1 Differential-to-LVDS Multiplexer	Renesas
8540	Numeric Displays	Excel

Other Datasheets by IDT

Part Number	Description
854S006I	Differential-to-LVDS Fanout Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text

4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination 854S057B Datasheet General Description The 854S057B is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz. The PCLK, nPCLK pairs can accept most standard differential input levels. Internal termination is provided on each differential input pair. The 854S057B operates using a 2.5V supply voltage. The fully differential architecture and low propagation delay make it ideal for use in high speed multiplexing applications. The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the internal resistor) will transform the device into a 2:1 multiplexer.