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9DBL0643 - 6-output 3.3V LP-HCSL Zero-Delay Buffer

Product Overview

IDT

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9DBL0643 6-output 3.3V LP-HCSL Zero-Delay Buffer by IDT - Datasheet Preview — Datasheet preview – 9DBL0643

Datasheet Details

Part number	9DBL0643
Manufacturer	IDT
File Size	321.02 KB
Description	6-output 3.3V LP-HCSL Zero-Delay Buffer
Datasheet	9DBL0643 Datasheet
Additional preview pages of the 9DBL0643 datasheet.

Product details

Description

The 9DBL06x3 devices are 3.3V members of IDT's Full-Featured PCIe clock family.

Features

Loss Of Signal (LOS) open drain output.
6.
1-200 MHz Low-Power (LP) HCSL DIF pairs.
9DBL0643 default Zout = 100Ω.
9DBL0653 default Zout = 85Ω.
Easy AC-coupling to other logic families, see IDT.

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Other Datasheets by IDT

9DBL06 - 6-output 3.3V PCIe Zero-Delay Buffer
9DBL0653 - 6-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL02 - 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0243 - 2-Output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0253 - 2-Output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0255 - PCIe Gen1-5 Clock Fanout Buffers

Published: Apr 5, 2019 |