Description
A0-A10
Address Input
BA0, BA1
Bank Select Address
I/O0 to I/O31 Data I/O
CLK System Clock Input
CKE CS
Clock Enable Chip Select
RAS
Row Address Strobe Command
CAS WE
Column A
Features
- Clock frequency: 166, 143 MHz.
- Fully synchronous; all signals referenced to a
positive clock edge.
- Internal bank for hiding row access/precharge.
- Single 3.3V power supply.
- LVTTL interface.
- Programmable burst length.
- (1, 2, 4, 8, full page).
- Programmable burst sequence:
Sequential/Interleave.
- Self refresh modes.
- 4096 refresh cycles every 64 ms.
- Random column address every clock cycle.
- Prog.