IS42S32200N Datasheet | ISSI

IS42S32200N IS45S32200N ® Long-term Support World Class Quality 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM ADVANCED INFORMATION JULY 2023 Features - Clock frequency: 200, 166, 143, 133 MHz - Fully synchronous; all signals referenced to a positive clock edge - Internal bank for hiding row access/precharge - Single 3.3V power supply - LVTTL interface - Programmable burst length: (1, 2, 4, 8, full page) - Programmable burst sequence: Sequential/Interleave - Self refresh modes - 4096 refresh cycles every 16ms (A2 grade) or 64ms (mercia, Industrial, A1 grade) - Random column address every clock cycle - Programmable CAS latency (2, 3 clocks) - Burst read/write and burst read/single write operations capability - Burst termination by burst stop and precharge mand OPTIONS - Packages: 86-pin TSOP-II 90-ball TF-BGA - Operating temperature range: mercial (0o C to + 70o C) Industrial (-40o C to + 85o C) Automotive Grade, A1 (-40o C to + 85o C) Automotive Grade, A2: (-40o C to +105o C) OVERVIEW ISSI's 64Mb Synchronous DRAM IS42/45S32200N is organized as 524,288 bits x 32-bit x 4-bank for improved performance.The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. KEY TIMING PARAMETERS Parameter -5 -6 -7...