IS43LR32100C, IS46LR32100C - 512K x 32Bits x 2Banks Mobile DDR SDRAM

Datasheet Details

Part number	IS43LR32100C, IS46LR32100C
Manufacturer	ISSI
File Size	1.16 MB
Description	512K x 32Bits x 2Banks Mobile DDR SDRAM
Datasheet	IS46LR32100C-ISSI.pdf
Note	This datasheet PDF includes multiple part numbers: IS43LR32100C, IS46LR32100C. Please refer to the document for exact specifications by model.

The IS43/46LR32100C is 33,554,432 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits.

JEDEC standard 1.8V power supply.
Two internal banks for concurrent operation.
MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave).
Fully differential clock inputs (CK, /CK).
All inputs except data & DM are sampled at the rising edge of the system clock.
Data I/O transaction on both edges of data strobe.
Bidirectional data strobe per byte of data (DQS).

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Published: Jun 28, 2016 |