QS532806A Datasheet Guaranteed Low Skew 3.3v CMOS Clock Driver/buffer

Manufacturer: Integrated Device Technology

Overview: QS532806/A GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW 3.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Datasheet Details

Part number	QS532806A
Manufacturer	Integrated Device Technology
File Size	104.69 KB
Description	Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer
Datasheet	QS532806A QS532806 Datasheet (PDF)

General Description

The QS532806 clock driver/buffer circuit can be used for clock buffering schemes where low skew is a key parameter.

The QS532806 offers two banks of five inverting outputs.

Designed in IDT's proprietary CMOS process, these devices provide low propagation delay buffering with onchip skew of 0.7ns for same-transition, same-bank signals.

Key Features

JEDEC compatible LVTTL level 10 low skew clock outputs Monitor output Clock inputs are 5V tolerant Pinout and function compatible with QS5806 25Ω on-chip resistors for low noise Input hysteresis for better noise margin Guaranteed low skew:.
0.7ns output skew (same bank).
0.9ns output skew (different bank).
1ns part-to-part skew Std. and A speed grades Available in QSOP and SOIC packages Q.

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