S7A803630M
Description
The S7A803630M and S7A801830M are 9,437,184-bit Synchronous Static Random Access Memory designed for high performance. It is organized as 256K(512K) words of 36(18) bits and integrates address and control registers, a 2-bit burst address counter and added some new functions for high performance applications; GW, BW, LBO, ZZ.
Key Features
- VDD = 1.8V (1.7V ~ 2.0V) or 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply
- VDDQ = 1.7V~2.0V I/O Power Supply (VDD=1.8V) or 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V)
- Synchronous Operation
- 2 Stage Pipelined operation with 4 Burst
- On-Chip Address Counter
- Self-Timed Write Cycle
- On-Chip Address and Control Registers
- Byte Writable Function
- Global Write Enable Controls a full bus-width write
- Power Down State via ZZ Signal
