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S7K3236T2M Datasheet 1mx36 & 2mx18 Ddrii+ Cio Bl2 Sram

Manufacturer: NETSOL

Overview: SS77KK33223366TT22MM SS77KK33221188TT22MM 11MMxx3366 && 22MMxx1188 DDDDRRIIII++ CCIIOO BBLL22 SSRRAAMM 36Mb DDRII+ CIO BL2 SRAM Specification (2.0 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS Compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO NETSOL PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN NETSOL PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND. 1. For updates or additional information about Netsol products, contact your nearest Netsol office. 2. Netsol products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. * Netsol reserves the rights to change products or specification without notice. Rev. 1.1 Apr. 2013 -1- S7K3236T2M S7K3218T2M 1Mx36 & 2Mx18 DDRII+ CIO BL2 SRAM Document Title 1Mx36 & 2Mx18 - Bit DDRII+ CIO Burst Length of 2 SRAM (2.0 Clock Read Latency) Revision History Rev. No. History 0.0 Initial Draft 1.0 Final spec release Add DC current spec 1.1 Change Thermal Resistance θJA value from 20.8°C/W to 16.3°C/W Draft Date Sep. 2012 Feb. 2013 Remark Preliminary Final Apr. 2013 Final Rev. 1.1 Apr. 2013 -2- S7K3236T2M S7K3218T2M 1Mx36 & 2Mx18 DDRII+ CIO BL2 SRAM 1Mx36 & 2Mx18 - Bit DDRII+ CIO Burst Length of 2 SRAM (2.

Datasheet Details

Part number S7K3236T2M
Manufacturer NETSOL
File Size 369.61 KB
Description 1Mx36 & 2Mx18 DDRII+ CIO BL2 SRAM
Datasheet S7K3236T2M-NETSOL.pdf

Key Features

  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future freguency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O.
  • Pipelined, double-data rate operation.
  • Common data input/output bus.
  • HSTL I/O.
  • Full data coherency, providing most current data.
  • Synchronous pipeline read with self timed late write.
  • Read latency : 2 clock cycles.

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