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74F109 - Positive J-K positive edge-triggered flip-flops

Description

The 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs.

Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input.

Features

  • manner without notice. This data sheet contains.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS 74F109 Positive J-K positive edge-triggered flip-flops Product specification IC15 Data Handbook 1990 Oct 23 Philips Semiconductors Philips Semiconductors Product specification Postive J-K positive edge-triggered flip-flops 74F109 FEATURE • Industrial temperature range available (–40°C to +85°C) DESCRIPTION The 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input. The J and K are edge-triggered inputs which control the state changes of the flip-flops as described in the function table.
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