Datasheet Details
| Part number | 74F109 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 586.73 KB |
| Description | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP |
| Datasheet | 74F109-etcTI.pdf |
|
|
Overview: SN54F109, SN74F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDFS047A – MARCH 1987 – REVISED OCTOBER 1993 • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and.
| Part number | 74F109 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 586.73 KB |
| Description | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP |
| Datasheet | 74F109-etcTI.pdf |
|
|
|
These devices contain two independent J-K positive-edge-triggered flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs.
When PRE and CLR are inactive (high), data at the J and K input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock pulse.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
 |
74F109 | Dual JK Positive Edge-Triggered Flip-Flop | National Semiconductor |
 |
74F109 | Positive J-K positive edge-triggered flip-flops | NXP |
 |
74F109 | Dual JK Positive Edge-Triggered Flip-Flop | Fairchild Semiconductor |
| Part Number | Description |
|---|---|
| 74F10 | TRIPLE 3-INPUT POSITIVE-NAND GATE |
| 74F11 | Triple 3-Input AND Gate |
| 74F112 | DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP |
| 74F138 | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| 74F153 | DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS |
| 74F157A | Quad 2-Input Multiplexer |
| 74F158A | Quadruple 2-Line To 1-Line Data Selectors/Multiplexers |
| 74F161A | SYNCHRONOUS 4-BIT BINARY COUNTER |
| 74F175 | Quad D-Type Flip-Flop |
| 74F20 | DUAL 4-INPUT POSITIVE-NAND GATES |