SSTUA32864 buffer equivalent, configurable registered buffer.
s s s s s s s s s s s s Configurable register supporting DDR2 Registered DIMM applications Configurable to 25-bit 1 : 1 mode or 14-bit 1 : 2 mode Controlled output impedanc.
Rev. 01 — 12 May 2005 Product data sheet
1. General description
The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 configu.
The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer designed for 1.7 V to 2.0 V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8.
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