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SSTU32865
1.8 V 28-bit 1:2 registered buffer with parity for DDR2 RDIMM applications
Rev. 02 — 28 September 2004 Product data sheet
1. General description
The SSTU32865 is a 1.8 V 28-bit 1:2 register specifically designed for use on two rank by four (2R × 4) and similar high-density Double Data Rate 2 (DDR2) memory modules. It is similar in function to the JEDEC-standard 14-bit DDR2 register, but integrates the functionality of the normally required two registers in a single package, thereby freeing up board real-estate and facilitating routing to accommodate high-density Dual In-line Memory Module (DIMM) designs.
SSTU32865 Datasheet
