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SSTUA32866 Datasheet configurable registered buffer

Manufacturer: NXP Semiconductors

General Description

The SSTUA32866 is a 1.8 V configurable register specifically designed for use on DDR2 memory modules requiring a parity checking function.

It is defined in accordance with the JEDEC standard for the SSTUA32866 registered buffer.

The register is configurable (using configuration pins C0 and C1) to two topologies: 25-bit 1 : 1 or 14-bit 1 : 2, and in the latter configuration can be designated as Register A or Register B on the DIMM.

Overview

www.DataSheet4U.com SSTUA32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Rev.

01 — 15 July 2005 Product data sheet 1.

Key Features

  • s s s s s s s s s s s s s s Configurable register supporting DDR2 up to 667 MT/s Registered DIMM.