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National Semiconductor Electronic Components Datasheet

LP2994 Datasheet

DDR Termination Regulator

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May 2002
LP2994
DDR Termination Regulator
General Description
The LP2994 regulator is designed to provide a linear solution
to meet the JEDEC SSTL-2 and SSTL-3 specifications (Se-
ries Stub Termination Logic) for active termination of DDR-
SDRAM. The device utilizes an internal operational amplifier
to provide linear regulation of VTT without the need for
expensive external components. The output stage prevents
shoot through while delivering 1.5A continuous current and
maintaining excellent load regulation. The LP2994 also in-
corporates an active low shutdown pin to tri-state the output
during Suspend To Ram (STR) states.
Patents Pending
Features
n Source and sink current
n Low external component count
n Independent analog and power rails
n Linear topology
n Small package SO-8
n Low cost and easy to use
n Shutdown pin
Applications
n SSTL-2
n SSTL-3
n DDR-SDRAM Termination
n DDR-II Termination
Typical Application Circuit
FIGURE 1. SSTL-2 VTT Termination
20045904
© 2002 National Semiconductor Corporation DS200459
www.national.com


National Semiconductor Electronic Components Datasheet

LP2994 Datasheet

DDR Termination Regulator

No Preview Available !

Connection Diagram
SO-8 (M08A) Package
Pin Description
SO-8 Pin
1
2
3
4
5
6
7
8
Name
NC
GND
VSENSE
SD
VDDQ
AVIN
PVIN
VTT
Ordering Information
Order Number
LP2994M
LP2994MX
Package Type
SO-8
SO-8
Top View
20045902
Function
No internal connection
Ground
Feedback pin for regulating VTT
Active low shutdown pin
Input for internal reference equal to VDDQ/2
Analog input pin
Power input pin
Output voltage for connection to termination resistors
NSC Package
Drawing
M08A
M08A
Supplied As
95 Units per Rail
2500 Units Tape and Reel
www.national.com
2


Part Number LP2994
Description DDR Termination Regulator
Maker National Semiconductor
PDF Download

LP2994 Datasheet PDF






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