LP2995 Datasheet | Texas Instruments

FEATURES - 2 Low Output Voltage Offset - Works with +5v, +3.3v and 2.5v Rails - Source and Sink Current - Low External ponent Count - No External Resistors Required - Linear Topology - Available in SOIC-8, SO Power PAD-8 or WQFN-16 Packages - Low Cost and Easy to Use APPLICATIONS - DDR Termination Voltage - SSTL-2 - SSTL-3 DESCRIPTION The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DDR DIMMS. WHITE SPACE WHITE SPACE WHITE SPACE WHITE SPACE Typical Application Circuit VDDQ = 2.5V VDD = 2.5V + 50PF VDDQ AVIN VREF VSENSE PVIN VREF = 1.25V + 0.1PF + 220PF VTT = 1.25V Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002- 2013, Texas Instruments Incorporated SNVS190M - FEBRUARY...