2.5V / 3.3V Quad Differential
The NB100LVEP17 is a 4-bit differential line receiver. The design
incorporates two stages of gain, internal to the device, making it an
excellent choice for use in high bandwidth amplifier applications.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
Inputs of unused gates can be left open and will not affect the
operation of the rest of the device.
• Maximum Input Clock Frequency > 2.5 GHz Typical
• Maximum Input Data Rate > 2.5 Gb/s Typical
• 250 ps Typical Propagation Delay
• Low Profile QFN Package
• PECL Mode Operating Range: VCC = 2.375 V to 3.8 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = −2.375 V to −3.8 V
• Q Output Will Default LOW with Inputs Open or at VEE
• VBB Output
• These are Pb−Free Devices
24 PIN QFN
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
May, 2014 − Rev. 8
Publication Order Number: