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Pan Jit International

PJP75N75 Datasheet Preview

PJP75N75 Datasheet

75V N-Channel Enhancement Mode MOSFET

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PJP75N75
75V N-Channel Enhancement Mode MOSFET
FEATURES
• RDS(ON), VGS@10V,IDS@30A=11m
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for Converters and Power Motor Controls
• Fully Characterized Avalanche Voltage and Current
• In compliance with EU RoHS 2002/95/EC directives
MECHANICAL DATA
• Case: TO-220AB Molded Plastic
• Terminals : Solderable per MIL-STD-750,Method 2026
• Marking : P75N75
Drain
Gate
Source
Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted )
PARAMETER
Symbol Limit
Drain-Source Voltage
VDS 75
Gate-Source Voltage
VGS +20
Continuous Drain Current
ID 7 5
Pulsed Drain Current 1)
ID M
Maximum Power Dissipation
TA =25OC
TA =75OC
PD
Op e ra ti ng J unc ti o n a nd S to ra g e Te mp e ra ture Ra ng e
TJ,TS TG
Avalanche Energy with Single Pulse
IAS=47A, VDD=37.5V, L=0.3mH
EAS
Junction-to-Case Thermal Resistance
RθJ C
350
105
62.5
-55 to +150
660
1.2
Junction-to Ambient Thermal Resistance(PCB mounted)2
RθJ A
62
Note: 1. Maximum DC current limited by the package
Uni ts
V
V
A
A
W
OC
mJ
OC/W
OC/W
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
STAD-JUN.11.2007
PAGE . 1




Pan Jit International

PJP75N75 Datasheet Preview

PJP75N75 Datasheet

75V N-Channel Enhancement Mode MOSFET

No Preview Available !

PJP75N75
ELECTRICAL CHARACTERISTICS ( TA=25OC unless otherwise noted )
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Drain-Source On-State
Re s i s ta nc e
Zero Gate Voltage Drain
C urre nt
Gate Body Leakage
Forward Transconductance
Dynamic
To ta l Ga te C ha r g e
Gate-Source Charge
Gate-Drain Charge
Turn-On D e la y Ti me
Turn-On Ri s e Ti me
Turn-Off D e la y Ti me
Turn-Off F a ll Ti me
Input C apaci tance
Output Capacitance
Re ve rs e Tra ns fe r
C a p a c i ta nc e
Source-Drain Diode
Max. Diode Forward Current
Diode Forward Voltage
S ym b o l
Te s t C o nd i ti o n
Mi n. Typ . Ma x. Uni ts
BVDSS
VGS (th)
V G S =0 V, ID =2 5 0 uA
V D S =V G S , ID =2 5 0 uA
75 -
1-
-V
3V
RD S (o n)
VGS =10V, ID =30A
VGS =10V, ID =30A, Tc=125O C
- 8.0 11
m
- - 20
ID S S
IG S S
gfS
VD S =75V, VGS =0V
VD S =75V, VGS =0V, Tc=125O C
VGS =+20V, VD S =0V
V D S >ID ( O N ) X RD S ( O N ) m a x, ID =1 5 A
-
-
-
20
-1
uA
- 10
- +100 nΑ
- -S
Qg
Q
gs
Qg d
td (o n)
tr
td (o ff)
tf
Ciss
Coss
Crss
V D S =3 0 V, ID =3 0 A
V G S =10V
VD D =30V , RL=15
ID =2A , VGE N=10V
RG =2.5
VD S =25V, VGS =0V
f=1.0MH
Z
- 83 -
- 8.9 - nC
- 24.3 -
- 18.2 22
- 15.6 20
ns
- 70.5 90
- 13.8 18
- 3150 -
- 300 -
pF
- 240 -
Is
V
SD
-
IS =3 0 A , V G S =0 V
- - 75 A
- 0.85 1.5 V
Switching
Test Circuit
VIN
RG
VDD
RL
VOUT
Gate Charge
Test Circuit
VGS
1mA
VDD
RL
RG
STAD-JUN.11.2007
PAGE . 2


Part Number PJP75N75
Description 75V N-Channel Enhancement Mode MOSFET
Maker Pan Jit International
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