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Panasonic Electronic Components Datasheet

XN1872 Datasheet

Silicon N-channel . Enhancement MOS FET

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Composite Transistors
XN1872
Silicon N-channel Enhancement MOS FET
For switching
s Features
q Two elements incorporated into one package.
(Source-coupled FETs)
q Reduction of the mounting area and assembly cost by one half.
0.65±0.15
5
4
3
2.8
+0.2
-0.3
1.5
+0.25
-0.05
Unit: mm
0.65±0.15
1
2
s Basic Part Number of Element
q 2SK621 × 2 elements
0.1 to 0.3
0.4±0.2
s Absolute Maximum Ratings (Ta=25˚C)
Parameter
Symbol
Ratings
Drain to source voltage
Rating Gate to source voltage
of
element Drain current
Total power dissipation
Overall Channel temperature
Storage temperature
VDSS
VGSO
ID
IDM
PT
Tch
Tstg
50
8
100
200
300
150
–55 to +150
Unit
V
V
mA
mA
mW
˚C
˚C
1 : Drain (Tr1)
2 : Drain (Tr2)
3 : Gate (Tr2)
4 : Source
5 : Gate (Tr1)
EIAJ : SC–74A
Mini Type Pakage (5–pin)
Marking Symbol: 5U
Internal Connection
FET 1
5
1
4
3
s Electrical Characteristics (Ta=25˚C)
Parameter
Symbol
Conditions
Drain to source voltage
VDSS
Drain current
IDSS
Gate cutoff current
IGSS
Gate threshold voltage
Vth
Drain resistance
RDS(on)
Forward transfer admittance
| Yfs |
Output voltage high level
VOH
Output voltage low level
Input resistance
Turn-on time
Turn-off time
VOL
R1+R2*1
ton*2
toff*2
Common source short-circuit input capacitance Ciss
*1 Pulse measurement
*2 Resistance ratio R1/R2 = 1/50
ID = 100µA, VGS = 0
VDS = 10V, VGS = 0
VGS = 8V, VDS = 0
ID = 100µA, VDS = VGS
ID = 20mA, VGS = 5V
ID = 20mA, VDS = 5V, f = 1kHz
VDS = 5V, VGS = 1V, RL = 200
VDS = 5V, VGS = 5V, RL = 200
VDD = 5V, VGS = 0 to 5V, RL = 200
VDD = 5V, VGS = 5 to 0V, RL = 200
VDS = 5V, VGS = 0, f = 1MHz
min
50
40
1.5
20
4.5
100
FET 2
2
typ max Unit
V
10 µA
80 µA
3.5 V
50
30 mS
V
1.0 V
200 k
1.0 µs
1.0 µs
9 15 pF
1


Panasonic Electronic Components Datasheet

XN1872 Datasheet

Silicon N-channel . Enhancement MOS FET

No Preview Available !

Composite Transistors
PT — Ta
500
400
300
200
100
0
0 40 80 120 160
Ambient temperature Ta (˚C)
| Yfs | — VDS
50 VDS=5V
Ta=25˚C
40
30
20
10
0
0 2 4 6 8 10
Drain to source voltage VDS (V)
1000
300
100
VIN — IO
VO=1V
Ta=25˚C
30
10
3
1
0.3
0.1
0.1
0.3 1 3 10 30
Output current IO (mA)
100
ID — VDS
120
Ta=25˚C
100
VGS=6.0V
80
5.5V
5.0V
60
4.5V
40
4.0V
20 3.5V
3.0V
0
0 2 4 6 8 10
Drain to source voltage VDS (V)
Ciss, Coss — VDS
12
VGS=0
f=1MHz
Ta=25˚C
10
Ciss
8
6
4
Coss
2
0
0.1 0.3 1 3 10 30 100
Drain to source voltage VDS (V)
XN1872
ID — VGS
120
VDS=5V
100
80 Ta=–25˚C
25˚C
60 75˚C
40
20
0
0 2 4 6 8 10
Gate to source voltage VGS (V)
RDS(ON) — VGS
120
ID=20mA
100
80
60
Ta=75˚C
40 25˚C
– 25˚C
20
0
0 2 4 6 8 10
Gate to source voltage VGS (V)
2


Part Number XN1872
Description Silicon N-channel . Enhancement MOS FET
Maker Panasonic Semiconductor
Total Page 2 Pages
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