74HCT7245 Datasheet | Philips Semiconductors

FEATURES - Octal bidirectional bus interface - Non-inverting 3-state outputs - Output capability: bus driver - ICC category: MSI - Schmitt-trigger action on all data inputs GENERAL DESCRIPTION The 74HC/HCT7245 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. 7A. The 74HC/HCT7245 are octal transceivers featuring non-inverting 3-state bus patible outputs in both send and receive directions. The “7245” features an output enable (OE) input for easy cascading and a send/receive input (DIR) for direction control. OE controls the outputs so that the buses are effectively isolated. The 74HC/HCT7245 have Schmitt-trigger inputs. These inputs are capable of transforming slowly changing input signals into sharply defined jitter-free output signals. 74HC/HCT7245 The “7245” is identical to the “245” but has hysteresis on the data inputs. FUNCTION TABLE INPUTS OE L L H Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state DIR L H X INPUTS/OUTPUTS An A=B inputs Z Bn inputs B=A Z QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL t PHL/ t PLH CI CI/O CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in p F VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay An to Bn input capacitance input/output capacitance power dissipation capacitance per transceiver notes 1 and 2 CONDITIONS HC CL = 15 p F; VCC = 5 V 8 3.5 10 40 HCT 12 3.5 10 40 ns p F p F p F UNIT December 1990 Philips Semiconductors Product specification Octal bus Schmitt-trigger transceiver;...