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74HCT7046A Phase-locked-loop

74HCT7046A Description

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The 74HC/HCT7046 are high-speed Si-gate CMOS devices and are specified in compliance with JEDEC standard no.

74HCT7046A Features

* Low power consumption
* Centre frequency up to 17 MHz (typ. ) at VCC = 4.5 V
* Choice of two phase comparators: EXCLUSIVE-OR; edge-triggered JK flip-flop;
* Excellent VCO frequency linearity
* VCO-inhibit control for ON/OFF keying and for low standby power co

74HCT7046A Applications

* VDEMOUT is the resultant of the initial phase differences of SIGIN and COMPIN as shown in Fig.8. Typical waveforms for the PC2 loop locked at fo are shown in Fig.9. When the frequencies of SIGIN and COMPIN are equal but the phase of SIGIN leads that of COMPIN, the p-type output driver at PC2OUT is

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Phase-locked-loop Philips
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