9DBV0631 Datasheet - Renesas

6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer

* Six 1

* 200 MHz Low-Power (LP) HCSL DIF pairs Key Specifications

* DIF additive cycle-to-cycle jitter < 5ps

* DIF output-to-output skew < 60ps

* PCIe Gen5 CC additive phase jitter < 40fs RMS

* 12kHz

* 20MHz additive phase jitter = 156fs RMS at 15

9DBV0631

746.99 KB

6-output 1.8v pcie zero-delay/fanout clock buffer.

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