9DBV0631 - 6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer

Renesas

Datasheet Details

Part number	9DBV0631
Manufacturer	Renesas ↗
File Size	746.99 KB
Description	6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer
Datasheet	9DBV0631-Renesas.pdf

The 9DBV0631 is a member of Renesas’ 1.8V Very-Low-Power (VLP) PCIe family. 5 Zero Delay/Fanout Buffer (ZDB/FOB) Output

Six 1.
200 MHz Low-Power (LP) HCSL DIF pairs Key Specifications.
DIF additive cycle-to-cycle jitter < 5ps.
DIF output-to-output skew < 60ps.
PCIe Gen5 CC additive phase jitter < 40fs RMS.
12kHz.
20MHz additive phase jitter = 156fs RMS at 156.25MHz (typical) Block Diagram Features/Benefits.
LP-HCSL outputs; save 12 resistors compared to standard PCIe devices.
55mW typical power consumption in PLL mode; minimal power co.

📁 9DBV0631 Similar Datasheet

Other Datasheets by Renesas

Published: Feb 12, 2024 |