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Renesas Electronics Components Datasheet

BB506M Datasheet

Built in Biasing Circuit MOS FET IC UHF RF Amplifier

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BB506M
Built in Biasing Circuit MOS FET IC
UHF RF Amplifier
Features
Built in Biasing Circuit; To reduce using parts cost & PC board space.
High gain
www.DataSheet4U.cPoGm= 24 dB typ. (f = 900 MHz)
Low noise
NF = 1.4 dB typ. (f = 900 MHz)
Low output capacitance
Coss = 1.1 pF typ. (f = 1 MHz)
Provide mini mold packages: CMPAK-4 (SOT-343mod)
Outline
Notes:
RENESAS Package code: PLSP0004ZA-A
(Package name: MPAK-4)
2
3
1
4
1. Marking is “FS-“.
2. BB506M is individual type number of RENESAS BBFET.
REJ03G1604-0100
Rev.1.00
Nov 26, 2007
1. Source
2. Gate1
3. Gate2
4. Drain
Absolute Maximum Ratings
Item
Drain to source voltage
Gate1 to source voltage
Symbol
VDS
VG1S
Gate2 to source voltage
VG2S
Drain current
Channel power dissipation
ID
PchNote3
Channel temperature
Tch
Storage temperature
Tstg
Notes: 3. Value on the glass epoxy board (50 mm × 40 mm × 1 mm).
Ratings
6
+6
–0
+6
–0
30
300
150
–55 to +150
(Ta = 25°C)
Unit
V
V
V
mA
mW
°C
°C
This device is sensitive to electro static discharge. An adequate careful handling procedure is requested.
REJ03G1604-0100 Rev.1.00 Nov 26, 2007
Page 1 of 8


Renesas Electronics Components Datasheet

BB506M Datasheet

Built in Biasing Circuit MOS FET IC UHF RF Amplifier

No Preview Available !

BB506M
Electrical Characteristics
Item
Drain to source breakdown
voltage
Gate1 to source breakdown
voltage
Gate2 to source breakdown
voltage
Gate1 to source cutoff
current
Gate2 to source cutoff
current
www.DataSheetG4Ua.tceo1mto source cutoff
voltage
Gate2 to source cutoff
voltage
Drain current
Symbol
V(BR)DSS
V(BR)G1SS
V(BR)G2SS
IG1SS
IG2SS
VG1S(off)
VG2S(off)
ID(op)
Forward transfer admittance
|yfs|
Input capacitance
Output capacitance
Power gain
Noise figure
Ciss
Coss
PG
NF
Min
6
+6
+6
0.5
0.4
12
27
1.2
0.7
19
(Ta = 25°C)
Typ Max Unit
Test Conditions
— — V ID = 200 µA, VG1S = VG2S = 0
— — V IG1 = +10 µA, VG2S = VDS = 0
— — V IG2 = +10 µA, VG1S = VDS = 0
— +100 nA VG1S = +5 V, VG2S = VDS = 0
— +100 nA VG2S = +5 V, VG1S = VDS = 0
0.8 1.1
V VDS = 5 V, VG2S = 4 V, ID = 100 µA
0.7 1.0
V VDS = 5 V, VG1S = 5 V, ID = 100 µA
16 20 mA VDS = 5 V, VG1 = 5 V, VG2S = 4 V
RG = 100 k
32 38 mS VDS = 5 V, VG1 = 5 V, VG2S = 4 V
RG = 100 k, f = 1 kHz
1.6 2.0 pF VDS = 5 V, VG1 = 5 V, VG2S = 4 V
1.1 1.5 pF RG = 100 kΩ, f = 1 MHz
24 29 dB VDS = 5 V, VG1 = 5V, VG2S = 4 V
1.4 2.1 dB RG = 100 kΩ, f = 900 MHz
Bias Circuit for Operating Items (ID(op), |yfs|, Ciss, Coss, NF, PG)
VG2
Gate 2
RG
Gate 1
VG1
Drain
A
ID
Source
REJ03G1604-0100 Rev.1.00 Nov 26, 2007
Page 2 of 8


Part Number BB506M
Description Built in Biasing Circuit MOS FET IC UHF RF Amplifier
Maker Renesas Technology
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BB506M Datasheet PDF






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