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STPMIC1CPQR - Highly integrated power management

Download the STPMIC1CPQR datasheet PDF. This datasheet also covers the STPMIC1 variant, as both devices belong to the same highly integrated power management family and are provided as variant models within a single manufacturer datasheet.

Description

The STPMIC1 is a fully integrated power management IC designed for products based on high integrated application processor designs requiring low power and high efficiency.

Features

  • Input voltage range from 2.8 V to 5.5 V.
  • 4 adjustable general purpose LDOs.
  • 1 LDO for DDR3 termination (sink-source), bypass mode for low power DDR or as general purpose LDO.
  • 1 LDO for USB PHY supply with automatic power source detection.
  • 1 reference voltage LDO for DDR memory.
  • 4 adjustable adaptive constant on-time (COT) buck SMPS converters.
  • 5.2 V / 1.1 A boost SMPS with bypass mode for 5 V input or battery input.
  • 1 power.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (STPMIC1-STMicroelectronics.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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STPMIC1 Datasheet Highly integrated power management IC for micro processor units Product status link STPMIC1 Device summary STPMIC1APQR STPMIC1BPQR Order code STPMIC1CPQR STPMIC1DPQR STPMIC1EPQR Packing WFQFN 44L (5x6x0.8) Features • Input voltage range from 2.8 V to 5.5 V • 4 adjustable general purpose LDOs • 1 LDO for DDR3 termination (sink-source), bypass mode for low power DDR or as general purpose LDO • 1 LDO for USB PHY supply with automatic power source detection • 1 reference voltage LDO for DDR memory • 4 adjustable adaptive constant on-time (COT) buck SMPS converters • 5.2 V / 1.
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