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KM48S16030 Datasheet 4M x 8Bit x 4 Banks Synchronous DRAM

Manufacturer: Samsung Semiconductor

General Description

The KM48S16030 is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clcok cycle.

Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

Overview

KM48S16030 4M x 8Bit x 4 Banks Synchronous DRAM.

Key Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs -. CAS Latency (2 & 3) -. Burst Length (1, 2, 4, 8 & full page) -. Burst Type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst Read Single-bit Write operation.
  • DQM for masking.
  • Auto & self refresh.
  • 64ms refresh period (4K cycle.