KM68B261A Datasheet | Samsung Semiconductor

32K x 8 Bit High-Speed Bi CMOS Static RAM Features - Fast Access Time 6,7,8ns(Max.) - Low Power Dissipation Standby (TTL) : 110 m A(Max.) (CMOS) : 20 m A(Max.) Operating Current : 170 m A(f=100MHz) - Single 5V ± 5% Power Supply - TTL patible Inputs and Outputs .. - Fully Static Operation - No Clock or Refresh required - Three State Outputs - Center Power/Ground Pin Configuration - Standard Pin Configuration KM68B261AJ : 32-SOJ-300 Bi CMOS SRAM GENERAL DESCRIPTION The KM68B261A is a 262,144-bit high-speed Static Random Access Memory organized as 32,768 words by 8 bits. The KM68B261A uses eight mon input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using Samsung`s advanced Bi CMOS process and designed for high-speed system applications. It is particularly well suited for use in highdensity high-speed system applications. The KM68B261A is packaged in a 300 mil 32-pin plastic SOJ. FUNCTIONAL BLOCK DIAGRAM Pre-Charge Circuit PIN CONFIGURATION(TOP VIEW) A0 A1 A2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 N.C A14 A13 A12 /OE I/O8 I/O7 Vss Vcc I/O6 I/O5 A11 A10 A9 A8 N.C A0 A1 A2 A3 A4 A5 A6 Row Select MEMORY ARRAY 128 Rows 256x8 Columns A3 /CS I/O1 I/O2 Vcc Vss I/O3 I/O4 /WE A4 Data Cont. I/O Circuit Column Select A5 A6 A7 25 24 23 22 21 20 19 18 17 I/O1-I/O8 A7 A8 A9 A10 A11 A12 A13 A14 PIN DESCRIPTION Pin Name Pin Function Address Inputs Write Enable Chip Select Output Enable Data Inputs/Outputs Power (5V) Ground No Connection A0-A14 /WE /CS /OE I/O1-I/O8 Vcc Vss N.C /CS /WE /OE Rev 2.0...