ZL30406 Datasheet - Zarlink

SONET/SDH Clock Multiplier PLL

ZL30406 Features

* Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates Provides four LVPECL differential output clocks at 77.76 MHz Provides a CML differential clock programm

ZL30406 General Description

The ZL30406 is an analog phase-locked loop (APLL) designed to provide rate conversion and jitter attenuation for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment. The ZL30406 generates very low jitter clocks that meet the jitter requirements of Telcord.

ZL30406 Datasheet (307.93 KB)

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Datasheet Details

Part number:

ZL30406

Manufacturer:

Zarlink

File Size:

307.93 KB

Description:

Sonet/sdh clock multiplier pll.

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ZL30406 SONET SDH Clock Multiplier PLL Zarlink

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ZL30406 Features

ZL30406 General Description

Datasheet Details

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