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SCAS890E
- OCTOBER 2009
- REVISED NOVEMBER 2015
CDCLVP1208 Eight LVPECL Output, High-Performance Clock 2:8 Buffer
1 Features
- 1 2:8 Differential Buffer
- Selectable Clock Inputs Through Control terminal
- Universal Inputs Accept LVPECL, LVDS, and
LVCMOS/LVTTL
- Eight LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 73 mA
- Very Low Additive Jitter: <100 fs,rms in 10 kHz to
20 MHz Offset Range:
- 57 fs, rms (typical) at 122.88 MHz
- 48 fs, rms (typical) at 156.25 MHz
- 30 fs, rms (typical) at 312.5 MHz
- 2.375-V to 3.6-V Device Power Supply
- Maximum...