CDCLVP1216 Overview
The CDCLVP1216 is a highly versatile, low additive jitter buffer that can generate 16 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of munication applications. It has a maximum clock frequency up to 2 GHz.
CDCLVP1216 Key Features
- 1 2:16 Differential Buffer
- Selectable Clock Inputs Through Control Pin
- Universal Inputs Accept LVPECL, LVDS, and
- 16 LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 110 mA
- Very Low Additive Jitter: <100 fs, RMS in 10-kHz
- 57 fs, RMS (Typical) at 122.88 MHz
- 48 fs, RMS (Typical) at 156.25 MHz
- 30 fs, RMS (Typical) at 312.5 MHz