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CDCLVP1212 - High-Performance Clock Buffer

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General Description

The CDCLVP1212 is a highly versatile, low additive jitter buffer that can generate 12 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of communication applications.

It has a maximum clock frequency up to 2 GHz.

The CDCLVP1212

Overview

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCLVP1212 SCAS886E – AUGUST 2009 – REVISED DECEMBER 2015 CDCLVP1212 LVPECL Output, High-Performance Clock Buffer.

Key Features

  • 1 2:12 Differential Buffer.
  • Selectable Clock Inputs Through Control Terminal.
  • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL.
  • 12 LVPECL Outputs.
  • Maximum Clock Frequency: 2 GHz.
  • Maximum Core Current Consumption: 88 mA.
  • Very Low Additive Jitter:.

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