CDCLVP1212 Overview
The CDCLVP1212 is a highly versatile, low additive jitter buffer that can generate 12 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of munication applications. It has a maximum clock frequency up to 2 GHz.
CDCLVP1212 Key Features
- 1 2:12 Differential Buffer
- Selectable Clock Inputs Through Control Terminal
- Universal Inputs Accept LVPECL, LVDS, and
- 12 LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 88 mA
- 57 fs, rms (typ) @ 122.88 MHz
- 48 fs, rms (typ) @ 156.25 MHz
- 30 fs, rms (typ) @ 312.5 MHz
- 2.375-V to 3.6-V Device Power Supply