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SCAS886E
- AUGUST 2009
- REVISED DECEMBER 2015
CDCLVP1212 LVPECL Output, High-Performance Clock Buffer
1 Features
- 1 2:12 Differential Buffer
- Selectable Clock Inputs Through Control Terminal
- Universal Inputs Accept LVPECL, LVDS, and
LVCMOS/LVTTL
- 12 LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 88 mA
- Very Low Additive Jitter: <100 fs, rms in 10-kHz to
20-MHz Offset Range:
- 57 fs, rms (typ) @ 122.88 MHz
- 48 fs, rms (typ) @ 156.25 MHz
- 30 fs, rms (typ) @ 312.5 MHz
- 2.375-V to 3.6-V Device Power Supply
- Maximum Propagation Delay: 550 ps
-...