SN65DSI86 Description
The SN65DSI86 DSI to embedded DisplayPort (eDP) bridge.
SN65DSI86 Key Features
- Implements MIPI® D-PHY version 1.1 physical layer front-end and display serial interface (DSI) version 1.02.00
- Dual-channel DSI receiver configurable for one, two, three, or four D-PHY data lanes per channel operating up to 1.5 Gbp
- Supports 18 bpp and 24 bpp DSI video packets with RGB666 and RGB888 formats
- MIPI front-end configurable for single-channel or dual-channel DSI configuration
- Supports dual-channel DSI odd, even and left, right operating modes
- 1.2-V main VCC power supply and 1.8-V supply for digital I/Os
- Low-power features include panel refresh and MIPI ultralow power state (ULPS) support
- DisplayPort lane polarity and assignment configurable
- Supports 12-MHz, 19.2-MHz, 26-MHz, 27-MHz, and 38.4-MHz frequencies through external reference clock (REFCLK)
- ESD rating ±4 kV (HBM)