74HC237D Datasheet | Nexperia

description The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially bines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobes (stored address) applications in bus-oriented systems. 2. Features and benefits - bines 3-to-8 decoder with 3-bit latch - Multiple input enable for easy expansion or independent controls - Active HIGH mutually exclusive outputs - Wide supply voltage range from 2.0 V to 6.0 V - CMOS low power dissipation - High noise immunity - Latch-up performance exceeds 100 m A per JESD 78 Class II Level B - plies with JEDEC standards: - JESD8C (2.7 V to 3.6 V) - JESD7A (2.0 V to 6.0 V) - ESD protection: - HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V - CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V - Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74HC237D -40 °C to +125 °C Name SO16 74HC237PW -40 °C to +125 °C TSSOP16 Description plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm Version SOT109-1 SOT403-1 Nexperia 74HC237 3-to-8 line decoder, demultiplexer with address latches 4. Functional diagram 1 A0 2 A1 3 A2 5 E1 6 E2 4 LE INPUT LATCHES 3 TO 8 DECODER Y0 15 Y1 14 Y2 13 Y3 12 Y4 11 Y5 10 Y6 9 Y7 7 Fig. 1. Functional...