ADS6632A4A Datasheet PDF - A-Data Technology Synchronous DRAM Specs

ADS6632A4A - Synchronous DRAM

This page provides the datasheet information for the ADS6632A4A, a member of the ADS Synchronous DRAM family.

Datasheet Summary

Description

The ADS6632A4A are four-bank Synchronous DRAMs organized as 524,288 words x 32 bits x 4 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.

Features

JEDEC standard LVTTL 3.3V power supply.
MRS Cycle with address key programs -CAS Latency (2 & 3) -Burst Length (1,2,3,8,& full page) -Burst Type (sequential & Interleave).
4 banks operation.
All inputs are sampled at the positive edge of the system clock.
Burst Read single write operation.
Auto & Self refresh.
4096 refresh cycle.
DQM for masking.
Package:86-pins 400 mil TSOP-Type II Ordering Information. Part No. Frequen.

Datasheet Details

Part number	ADS6632A4A
Manufacturer	A-Data Technology
File Size	228.27 KB
Description	Synchronous DRAM
Datasheet	ADS6632A4A Datasheet
Additional preview pages of the ADS6632A4A datasheet.

📁 Similar Datasheet

ADS60C100L - 3 Quadrants Triacs (ADV)

ADS60C100S - 3 Quadrants Triacs (ADV)

ADS60C120L - 3 Quadrants Triacs (ADV)

ADS60C120S - 3 Quadrants Triacs (ADV)

ADS60C160L - 3 Quadrants Triacs (ADV)

ADS60C160S - 3 Quadrants Triacs (ADV)

ADS6122 - Analog-to-Digital Converters (Texas Instruments)

ADS6123 - Analog-to-Digital Converters (Texas Instruments)

ADS6124 - Analog-to-Digital Converters (Texas Instruments)

ADS6125 - Analog-to-Digital Converters (Texas Instruments)

Full PDF Text Transcription

Click to expand full text

A-Data Synchronous DRAM ADS6632A4A 512K x 32 Bit x 4 Banks General Description The ADS6632A4A are four-bank Synchronous DRAMs organized as 524,288 words x 32 bits x 4 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications Features •JEDEC standard LVTTL 3.

Published: Mar 23, 2005 |