Datasheet4U Logo Datasheet4U.com

AT90C8534 - Microcontroller

Datasheet Summary

Description

The AT90C8534 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture.

Features

  • Utilizes the AVR® RISC Architecture.
  • AVR.
  • High-performance and Low-power RISC Architecture.
  • 118 Powerful Instructions.
  • Most Single Clock Cycle Execution.
  • 32 x 8 General-purpose Working Registers.
  • Up to 1.5 MIPS Throughput at 1.5 MHz Data and Nonvolatile Program Memory.
  • 8K Bytes Flash Program Memory Endurance: 1,000 Write/Erase Cycles.
  • 256 Bytes Internal SRAM.
  • 512 Bytes EEPROM Endurance: 100,000 Write/Erase.

📥 Download Datasheet

Datasheet preview – AT90C8534

Datasheet Details

Part number AT90C8534
Manufacturer ATMEL Corporation
File Size 802.72 KB
Description Microcontroller
Datasheet download datasheet AT90C8534 Datasheet
Additional preview pages of the AT90C8534 datasheet.

📁 Similar Datasheet

  • AT90-0001 - Digital Attenuator/ 31.0 dB/ 5-Bit/ TTL Driver/ DC-6.0 GHz (Tyco Electronics)
  • AT90-0106 - Digital Attenuator/ 50 dB/ 6-Bit/ TTL Driver/ DC-2.4 GHz (Tyco Electronics)
  • AT90-0107 - Digital Attenuator/ 31.5 dB/ 6-Bit/ TTL Driver/ DC-4.0 GHz (Tyco Electronics)
  • AT90-0233 - Digital Attenuator/ 30 dB/ 4-Bit/ TTL Driver/ DC - 2.5 GHz (Tyco Electronics)
  • AT90-0263 - Digital Attenuator/ 31 dB/ 5-Bit/ TTL Driver/ DC-4.0 GHz (Tyco Electronics)
  • AT90-0283 - Digital Attenuator/ 15.5 dB/ 5-Bit/ TTL Driver/ DC-3.5 GHz (Tyco Electronics)
  • AT90-0413 - Digital Attenuator/ 15 dB/ 4-Bit/ TTL Driver/ DC - 4.0 GHz (Tyco Electronics)
  • AT90-1106 - Digital Attenuator/ 50 dB/ 6-Bit/ TTL Driver/ DC-2.4 GHz (Tyco Electronics)
  • AT90-1107 - Digital Attenuator/ 31.5 dB/ 6-Bit/ TTL Driver/ DC-4.0 GHz (Tyco Electronics)
  • AT90-1233 - Digital Attenuator/ 30 dB/ 4-Bit/ TTL Driver/ DC - 2.5 GHz (Tyco Electronics)
Other Datasheets by ATMEL Corporation

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com Features • Utilizes the AVR® RISC Architecture • AVR – High-performance and Low-power RISC Architecture – 118 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General-purpose Working Registers – Up to 1.5 MIPS Throughput at 1.
Published: |