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ADCLK854 - Low Power Clock Fanout Buffer

ADCLK854 Description

www.DataSheet4U.com 1.8 V, 12-LVDS/24-CMOS Output, Low Power Clock Fanout Buffer ADCLK854 FUNCTIONAL BLOCK DIAGRAM ADCLK854 VREF CLK0 CLK0 CLK1 CLK1 .
The ADCLK854 is a 1.

ADCLK854 Features

* 2 selectable differential inputs Selectable LVDS/CMOS outputs Up to 12 LVDS (1.2 GHz) or 24 CMOS (250 MHz) outputs

ADCLK854 Applications

* Low jitter clock distribution Clock and data signal restoration Level translation Wireless communications Wired communications Medical and industrial imaging ATE and high performance instrumentation CTRL_B OUT4 (OUT4A) OUT4 (OUT4B) OUT5 (OUT5A) OUT5 (OUT5B) OUT6 (OUT6A) OUT6 (OUT6B) OUT7 (OUT7A) OU

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Low Power Clock Fanout Buffer Analog Devices
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